Abstract of MSc project:

By: Miss. Nora Houari

Title:

September 1999.

Almost any digital computer can be used for real-time processing and control, but not all are equally easily adopted for such work. Real -time systems are built with due consideration of high performance computing, choice of computing hardware and architecture, issues surrounding sequential uni-processing, parallel multi-processing and software support. These depend on the nature of the problem. Whether or not a reasonable execution time can be expected depends on the particular application and its implementation. To achieve maximum performance benefits, it is necessary to develop performance evaluation of the implementation in relation to the application.

This project presents an investigation into the performance evaluation for real time implementations of several applications. The investigation into the real-time implementations involve a number of high performance computing domains, namely uni-processor architectures of SUN-SPARC-TMS390S10, Pentium II (PC1), Pentium SDRAM II (PC2), Inmos T805 (T8), TMS320C40 (C40), and Intel i860 (i860), and a parallel multi-processor networks of T805s and C40s.

The algorithms considered cover three main areas: fixed and adaptive control with a PID, beam simulation and identification algorithms, adaptive filtering with a LMS (Least Mean Square) algorithm, and spectral analysis with an FFT (Fast Fourier Transform) algorithm. These algorithms are of varying degrees of regularity relative to one another, and are, thus utilised for a range of load sizes to explore the performance evaluation of the real-time implementations on uni-processor architectures and parallel multi-processor architectures.

The real-time parallel implementation issues including partitioning, mapping, and inter-processor communication are discussed. Performance evaluation criteria such as compilers and optimisation facility are also considered.

A comparative performance evaluation of the architectures, on the basis of computing performance of the processing elements (PEs), inter-processor communication, load size variations and compiler performance is presented to establish merits of design and development of real time implementations for signal processing and control applications.